It is conventional practice to form a wiring line in a fine wiring groove, a hole, or a resist opening provided in the surface of a semiconductor wafer etc., or to form a bump (protruding electrode), which is electrically connected with a package electrode etc., on the surface of a semiconductor wafer etc. Known methods for forming such wiring lines and bumps include, for example, an electroplating method, a vapor deposition method, a printing method, and a ball bump method. Due to increase in the number of I/Os and the reduction in pitch of semiconductor chips in the recent years, the electroplating method which allows for miniaturization and relatively stable performance has been widely used.
A plating apparatus used for the electroplating method is equipped with a substrate holder which holds a substrate such as a semiconductor wafer with an edge surface and the back surface of the substrate being sealed and the surface (surface to be plated) being exposed. When a plating process of the substrate surface is performed in this plating apparatus, the substrate holder holding the substrate is immersed in a plating solution.
Here, when a plating process is performed on the substrate held by the substrate holder, the substrate needs to be electrically connected with the negative voltage side of a power source to apply a negative voltage to the substrate surface. For this purpose, the substrate holder is provided with an electrical contact for electrically connecting an external wiring line extending from the power source and the substrate with each other. The electrical contact is configured to contact with a seed layer (conductive layer) formed on the surface of the substrate to thereby apply a negative voltage to the substrate.
Here, depending on the type of substrate, the substrate to be plated can vary in contact position of the electrical contact. For example, in the case of a substrate for forming a bump or a redistribution layer in which a resist pattern is formed on the surface to be plated, it is necessary to bring the electrical contact into contact with the outer peripheral end of the substrate where no resist pattern is formed. Due to the requirement for producing many chips from one substrate, it has become common to bring the electrical contact and the seal into contact with the substrate further on the outer side. On the other hand, a substrate with a TSV (Through Silicon Via) formed in it is composed of a support substrate and an active wafer bonded to the support substrate, and the surface of the active wafer is the surface to be plated. It is therefore necessary that the electrical contact comes into contact with the active wafer. The diameter of this active wafer is smaller than the diameter of the support substrate. Accordingly, the contact position of the electrical contact on the active wafer surface should be located further on the inside in the radial direction than the contact position of the electrical contact on the substrate for forming a bump or a rewiring line.
In order to form a plating film of a constant thickness on a substrate, it is necessary to reliably bring the electrical contact into contact with the seed layer and apply a plating current. For this purpose, a substrate holder provided with an electrical contact for exclusive use with each different type of substrate is designed and loaded on a plating apparatus.